| Thursday, October 11, 2007 | |||||||||
| 8:00 AM | 8:30 AM | Registration, continental breakfast, etc. | |||||||
| 8:30 AM | 8:40 AM | Welcome | Dougal | ||||||
| 8:40 AM | 9:00 AM | The Vision and Ambitions of VTB | Dougal | ||||||
| 9:00 AM | 9:20 AM | Model development - new capabilities in the interpretive language | Langland | ||||||
| 9:20 AM | 9:40 AM | Component Builder in advanced VTB Pro modeling for ESC | D'Arco | ||||||
| 9:40 AM | 9:50 AM | Break (Faculty Lounge - rm. 1A03) | |||||||
| 9:50 AM | 10:10 AM | VTB in the optimization loop with GOSET | Monti | ||||||
| 10:10 AM | 10:30 AM | VTB in the physical world - FPGA interface to VTB Realtime | Work | ||||||
| 10:30 AM | 10:50 AM | Interfacing VTB with RTDS at FSU | Deshmukh | ||||||
| 10:50 AM | 11:50 AM | Hands-on: Basic use of VTB Pro | |||||||
| 11:50 AM | 12:50 PM | Lunch (Faculty Lounge - rm. 1A03) | |||||||
| 12:50 PM | 1:10 PM | At your service: External control of the VTB Pro sim server | |||||||
| 1:10 PM | 1:30 PM | VTB-realtime installation at NSWC | Monti | ||||||
| 1:30 PM | 1:50 PM | Gaming the simulator - VTB Pro in a multiplayer environment | Fawcett/Shepherd | ||||||
| 1:50 PM | 2:50 PM | Hands-on: Component Builder | |||||||
| 2:50 PM | 3:00 PM | Break (Faculty Lounge - rm. 1A03) | |||||||
| 3:00 PM | 3:20 PM | Distributed multirate solver under Windows | Leonard | ||||||
| 3:20 PM | 3:40 PM | VTB solver on FPGA - superspeed solver for RT applications | Shi | ||||||
| 3:40 PM | 4:00 PM | VTB solver on multicore DSP | Wang G | ||||||
| 4:00 PM | 4:20 PM | Incorporating Agents into system simulation | Deshmukh | ||||||
| 4:20 PM | 4:40 PM | Simulink interface with VTB Pro | Heilman | ||||||
| 4:40 PM | 5:00 PM | First Day Wrapup | |||||||
| Friday, October 12, 2007 | |||||||||
| 8:00 AM | 8:00 AM | Continental breakfast | |||||||
| 8:00 AM | 8:20 AM | Power hardware in the loop in Industrial R&D environment | Monti | ||||||
| 8:20 AM | 8:40 AM | New generation of PHIL interface based on GaN devices | Wang B | ||||||
| 8:40 AM | 9:00 AM | Realtime Multirate Simulation for Power Electronics | Zenor/Word | ||||||
| 9:00 AM | 10:00 AM | Hands-on: Module builder | |||||||
| 10:00 AM | 10:20 AM | Break (Faculty Lounge - rm. 1A03) | |||||||
| 10:20 AM | 10:40 AM | Modlyng - rapid model development for VTB Pro | Mantooth/? | ||||||
| 10:40 AM | 11:00 AM | Processor in the loop: Testing the Universal Control Architecture | Liu | ||||||
| 11:00 AM | 11:20 AM | Using ESL objects in VTB | Pearce? | ||||||
| 11:20 AM | 11:50 AM | RealPower - Use of VTB in multiprocessor war games | Leonard | ||||||
| 11:50 AM | 12:30 PM | Lunch (Faculty Lounge - rm. 1A03) | |||||||
| 12:30 PM | 1:30 PM | Hands-on: Eye-Sys - the visualization engine | Sechrest | ||||||
| 1:30 PM | 2:30 PM | Hands-on: Use of the genetic optimzer | Monti | ||||||
| 2:30 PM | Meeting Concludes | ||||||||